Well, the semester’s finally over. This one kept me especially busy even though I was only taking the average 4 classes: 6.012 (Microelectronic Devices and Circuits), 6.034 (Artificial Intelligence), 6.111 (Introductory Digital Systems Laboratory), and 21H.207 (The Energy Crisis). I enjoyed all of these classes. In addition, Next Make has finally gotten underway; we’ve received quite a bit of money from my dorm to build a lighting system. Next semester, I’ll be involved in a variety of activities and this January is definitely going to be exciting. In addition to working on the Next House lighting system, I’ll also be finishing my own lighting system and my door sign. I’m also TAing an introductory electronics class that I took in Freshman year.
By far, my busiest class was 6.111, “digital death lab.” This class taught the foundations of digital design with FPGAs. They had their own custom-designed FPGA boards: the 6.111 Labkit, complete with a 6-million gate Virtex 2 FPGA and a variety of peripheral chips. The largest contribution to the grade for the course was the final project, where students created some kind of design.
I decided to work on an idea that I came up with last winter, a parametric equalizer. Parametric equalizers are devices that effectively allow users to create arbitrary filters and apply them to an audio signal. This device was fairly simple; it took a “gain curve” — a mapping containing some divisor gain for each frequency bin of an FFT — and applied it to the output of a 1024-point FFT (a frequency domain signal). Then, it took an IFFT of the data to transform the signal back into the time domain and fed it to the audio output.
I’ve updated my verilog code, design report, and presentation slides. The design is small enough that it should be implementable one a Spartan 3 FPGA (such as the one on my Nexys2). The system only uses a mono signal right now; I simply need to duplicate it to generate a stereo sample. You can see a video of my demo here.